TCIII-2667ST | DDR4 & DDR3

Multi-Site Memory Module Test System

TurboCATS introduces a new line of redesigned TurboCATS III-2667ST family of multi-site memory module testing system ----- compact, high-performance, and equiped with enhanced productivity features.

The TCIII-2667ST family also features an optional 8 or 16 module testing, in parallel, for high thru-put on your production floor.


NEW ! The TurboCATS III-2667ST Family

Accelerate your testing with faster performance

  • DDR3 - supports speeds up to 2133Mbps
  • DDR4 - supports speeds up to 2667Mbps

High-end ATE's are designed to detect functional and AC/DC parametric failures but do not identify or pinpoint potential in-system failures. Most in-system failures are caused by functional and timing compatibility issues that are generated by the system chipset. Many in-system device failures occur during system boot up or during performance of a specific operation within a given system. To effectively test to include AC and DC parametric testing, most memory manufacturers incorporate a costly testing process as part of their Standard Operating Procedure (S.O.P.).

One of the most difficult challenges faced by memory manufacturers is finding a cost effective method to test their products so they can minimize time to market and field failures/returns. The manpower and equipment required for the extensive testing often result in budget overruns for various cost centers.

To assist manufacturers in their efforts to reduce costs, TurboCATS proudly introduces the TCIII-2667ST multi-site test system.

Device characterization and failure analysis tools, such as Shmoo plotting and address/data error logging, are included in the TCIII-2667ST to assist engineers with their design/debug processes. An optional hot temperature chamber is available to detect marginal timing and cell storage failures that often occur in high temperature system environments. The chamber is user programmable and can be set at temperatures ranging from 32°C to 85°C with 2°C resolution.




Test Capabilities

  • DDR3 - 1333Mbps, 1600Mbps, 1866Mbps, 2133Mbps
  • DDR4 - 1866Mbps, 2133Mbps, 2400Mbps, 2667Mbps
  • Clock frequency from 667MHz to 1334MHz

Powerful Failure Analysis Tool

  • Graphical Failure displays Failed Bad IC's and DQ pins' location
  • Error logging location of Row/Column/Blanks/Burst/DQ's for analyze failures
  • Address Scramble / Data Scramble
  • Includes optional tools Bit Failure Mapping and Schmoo Plot to display the failed
    Blank(s) / DQ's bit in the RAM

AC/DC Parametric & Function Test

  • Supports AC/DC parametric and user script pattern programming
  • Over 35 standard industry test patterns
  • Power / Pins short, contact, leakage, connectivity and Idd's testing
  • Enhanced DC function VSIM & ISVM to detect any short on the signal line or
    any open of the component's contact on PCB
  • Supports SPD Programming, Read/Write test, write-protect and etc.
  • Auto-Timing Calibration
  • Supports optional 12V pin of DDR4 for changing backup energy storage devices

Flexible Configuration

  • Form Factor supports: LODIMM, SODIMM, RDIMM, LRDIMM and custom form factors
  • Standard 4-site module testing, in parallel is available, for a high thru-put on production floor
  • Single adapter supports both unbuffered and registered module testing
  • Optional:
    • 8, 16 or 64 module testing is available
    • Heat chamber for hot environmental testing from 32°C to 85°C
    • Handler interface is available for combining the TCIII-2667ST test system with an automated handling system

TCIII-2667ST Family with Heat Chamber Optional

To enhance the reliability of the modules


The heat Chamber creates a hot testing environment to simulate the accelerated life testing and analyze the behaviors of the module.


Heat Chamber Specifications:

Power Supply : 220V, 50Hz (90 - 110% of rated voltage)
Power Consumption : Power-up : 15A, 220V
Normal operation : 10A, 220V
Display Method : 7 Segment LED Display
Processing value (PV) : Green
Setting value (SV) : Red
Display Accuracy : F.S ±0.5% rdg ±1 digit based on SV or 3°C Max.
Sampling Time : 0.5 sec. fixed
Vibration : 0.75mm amplitude at frequency of 10-55Hz in each of X, Y, Z directions for 2 hours
Ambient Temperature : -10 - 50°C
Storage Temperature : -20 - 60°C
Ambient Humidity : 35 - 85% RH
Temperature Range : 25°C - 85°C
Recommend Setting
Temperature :
Air Input : Min. 0.5 MPa - Max. 1.0 MPa
Min. 75 psi - 145 psi
Diameter of Gas Tube : 6 mm
Dimensions (LxWxH) : 26.2" (665mm) x 10.4" (265mm) x 37.2" (945mm)

All memory modules manufacturers want to offer the highest quality product they can at a price that allows them to stay competitive while still making a profit. Profitability are decreased when a manufacturer has to add steps and processes in their manufacturing process. They have found that functional testing alone is not enough to take modules from a tester and then put them in a system to test for possible heat related issues since it is too time consuming and costly.

One of the first things that manufacturers look to in terms of advanced and innovative functional testing is the TurboCATS TCIII-2667ST Family. With the purchase of the optional heat chamber, customers eliminate the extra procedure to perform heat related testing while the modules are undergoing functional testing. The ROI for manufacturers is significant when they look at integrating the heat testing process with the functional testing. Improved reliability, customer satisfaction, and increased profits are just a few of the many reasons to rely on the TurboCATS solution.


GUI Failure Analysis Tool


Graphical Identification of Failed DQ's location

It shows the test failures at a hardware level:

  • All bad ICs on the module
  • Corresponding bad IC pins in red


Shmoo Plot

Shmoo Plot is a two-dimensional diagram showing the status of the DQ bit of memory modules varying over a range of the user-selected parameters (timing and input voltage level).


Bit Failure Mapping

This is a tool that helps users to find and display the failed DQ bits in the ICs. The corresponding row and column displays the failed DQ bits with the aid of the diagrams.


Script Code Function Optional

TurboCATS designed a new feature called the Script Code in the new DDR3/DDR4 test system, the TCIII-2667ST test system. In the new system, the user can use the script programming language to create a customized test pattern. It can support up to maximum 2048 data patterns (optional). Once the pattern is created, the Script Code pattern generator/compiler is used to compile the code and then generate the new test pattern.


Script Code Debugger


Multi-Site Networking

TurboCATS can meet all of your testing needs while keeping costs to a minimum. Testers are available in 4, 8, 16 or 64 site configurations.



The DDR4 technology is quickly progressing and tests multiple modules that is critical to cost effective memory. TurboCATS is innovating with the new TCIII-2667ST multi-site test system that will test 4 modules with parallel.

The new TCIII-2667ST multi-site unit can be networked so the user can test up to 64 modules in parallel using only one PC to control the entire operation. This allows the user greater flexibility in terms of increasing testing capacity on an as needed basis. The user can add new testers when they need the capacity.

Cost are minimized since there will be no need for additional man labor to handle the increased capacity. The user can simply integrate the new unit into their existing network and utilize the PC that is already in place.


DC Checking Functions

Contact, Leakage, Connectivity and 12V Pin

Contact: This will detect any open pins on the contacts between test sockets & ICs before the functional testing begins. It will also detect any open pins on both passive and memory components on the PCB.
Leakage: This will detect the leakage current (in and out) of the IC pins.
Connectivity: This will detect shorts on the signal line as well as the proper values of resistor packs and discrete resistors to ensure that proper values are used in all places and are properly mounted.
12V Pin (optional) This will detect shorts on 12V power pin of DDR4 (NVDIMM) during the Initial Test.

Enhanced DC (VSIM & ISVM)


1. Voltage Sense and Current Measurement (VSIM)

This will detect shorts on the signal line as well as detect proper values of resistor packs and discrete resistors to Ensure that proper values are used in all places and properly mounted.

2. Current Sense and Voltage Measurement (ISVM)

A pattern that will detect any open pins on the contacts between test sockets and DIMM's before functional testing begins. This pattern will also detect any open pins on both passive and memory components on the PCB.

3. System Power Short Protection


Voltage ref short detection including programmable VREFCA and VREFDQ.



Test Frequency DDR3 533Mhz - 1067Mhz
DDR4 800Mhz - 1334Mhz
Switching Data Rate DDR3 1066Mbps - 2133Mbps
DDR4 1600Mbps - 2667Mbps
I/O Interface DDR3 SSTL-15, Class I & Class II
SSTL-135, Class I & Class II
DDR4 POD12 - 1.2V Pseudo Open Drain I/O
Clock Lines 3 pairs per site
Address Depth DDR3 16 Rows, 15 Columns, 3 Banks
16X / 15Y / 3Z per site
DDR4 18 Rows, 15 Columns, 4 Banks
18X / 15Y / 4Z per site
Data Width & Depth 72 I/O per site
Data Depth Supports 8 / 16 / 32 bit IC devices
DQS's Differential
Control Lines 4 CS's, 2 CLKE, 1 RAS, 1 CAS, 1 WE, etc. per site, up to 16 sites
Termination On-chip, dynamic
Variable Timing Edges tSU/tHD, tWD, tDQSS, tAC, etc.
Programmable Timing tRCD, tRP, tCL, tAL, tCWL, tWR, tRL, tWL, tRFC, etc.
1 pair of clock per IC socket
SPD Program Read, Program, Edit, Test, Byte Matching, Serialization, Write Protect,
Slot Test, etc.
Min. Control PC Requirement Windows 7 or better, Networking interface
Unit Dimensions (LxWxH)
* Approximate
4-site: 17.9" (455mm) x 16.7" (425mm) x 15.3" (390mm)
Unit Weight
* Approximate
79.2 lbs (36 kg)
AC Power Source 110-240VAC, 50/60Hz

Handler Interface Optional

Integrated to DDR3 / DDR4 testing & up to 64 sites

TCIII-2667ST series testers can be configured to 8, 16, or 64 site and integrated with the handler interface to support automated handler testing.


Software Screenshots

  • Main Operating Window

  • Test Device Configuration

  • Test Plan

  • Chip Scope