TCIII-1600ST DDR1/2/3 & SDRAM DIMM Tester
4 Powerful DC functions for today's OEM
High-end ATEs are designed to detect functional and AC/DC parametric failures but do not identify or pinpoint potential in-system failures. Most in-system failures caused by functional and timing compatibility issues that are generated by the system chipset. Many in-system device failures occur during system boot up or during the specific testing operation within a given system.
With the ability to test 16 modules in parallel and at speeds up to 1600Mbps, the TCIII-1600ST will meet the needs of an engineering group while being the ideal ATE for the production floor as well.
To effectively perform functional testing and in-system compatibility testing, most memory manufacturers incorporate a costly two (2) step testing process as part of their Standard Operating Procedure (S.O.P.).
- Functional and parametric testing
- In-System testing utilizing motherboards
One of memory manufacturers' most difficult challenges is finding a cost effective method of testing their products so they can minimize the time to market and field failures/ returns. To facilitate this costly and time consuming process, they must incorporate the two (2) step testing method. Capital expenditures, for the equipment and manpower required to perform this extensive testing, often result in budget overruns for various cost centers.
Support 16 DUT's in parallel testing
Designed for Performance & Affordability
To assist manufacturers in their efforts to minimize costs, TurboCATS introduces the TCIII-1600ST multi-site test system. Device characterization and failure analysis tools such as Schmoo plotting and address/data error logging are included on the TCIII-2133ST to assist engineers in their design/debug processes. An optional hot temperature chamber is also available to detect marginal timing and cell storage failures that often occur in high temperature system environments. The chamber is user programmable and can be set at temperatures ranging from 32°C to 85°C with 2°C resolution.
Powered for productivity
- DDR3 - 800Mbps, 1066Mbps, 1200Mbps, 1333Mbps, 1600Mbps
[ 240P LODIMM, 204P SODIMM, 204P SORDIMM, 240P DIMM LRDIMM ]
- DDR2 - 400Mbps, 533Mbps, 667Mbps, 800Mbps
[ 240P LODIMM, 200P SODIMM, 200P SORDIMM ]
- DDR1 - 200Mbps, 266Mbps, 333Mbps, 400Mbps
[ 184P LODIMM, 200P x32 LODIMM ]
- SDRAM - 200Mbps, 266Mbps
[ 168P LODIMM ]
NEW ! Recommended upgrade to 2133Mbps?
Learn more about the NEW TCIII-2133ST 2133Mbps DDR3 and DDR4 DIMM test system.
Enhanced DC (VSIM & ISVM)
1. Voltage Sense and Current Measurement (VSIM)
This will detect shorts on the signal line as well as detect proper values of resistor packs and discrete resistors to insure that proper values are used in all places as well as insuring that they are properly mounted.
2. Current Sense and Voltage Measurement (ISVM)
A pattern that will detect any "open pins" on the contacts between test sockets and DIMM's before functional testing begins. This pattern will also detect any open pins on both passive and memory components on the PCB.
3. System Power Short Protection
4. VREFA / VERFQ
Voltage ref short detection including programmable VREFCA and VREFDQ.
Combination of Failures
- Functional Failure: Cell stuck-at, coupling, neighborhood sensitivity and software error faults.
- Parametric Failure: (AC) Speed timing vs. Vdd threshold, (DC) Leakage and Idd's.
- Hot-Temperature Failure: System high temperature environment.
Bit Failure Mapping
Bit failure mapping is a tool that helps users find the failed DQ bits in the RAM. The corresponding row and column addresses the failed DQ bits, which will be displayed conveniently for the user with the aid of diagrams.
The failed Bank is spotted (Figure 1) and then the user can find the location of the failed DQ bit (Figure 2) if the user double-clicks the failed Bank.
Script Code Function Optional
Traditional test systems provide the user with a variety of AC test patterns to use in their testing process. If a customer wanted the capability to generate a proprietary test pattern, they had to purchase a high-end automated test system. For most companies this is cost prohibitive and not a viable option.
TurboCATS offers a new feature called "Script Code" in its new test system, the TCIII-1600ST. In this new system, the customer can use the script programming language to create a customized test pattern. Once the pattern is created, the "Script Code" pattern generator/ compiler is used to compile the code and then generate the new test pattern.
The "Script Code" function also contains a built-in compiler and debugger for the "Script Code" programming, which allows the customer to monitor the timing waveform of the programming algorithm as well as the timing bus transactions. This is all accomplished under the "Signal Tap" tool.
The new pattern is then imported into the test list and gives the customer a customized pattern with AC (tSU, tWD, tSAC, tRCD, tCL, tAL, tWR, tRP, tRC, tREF, tRFC, etc.) and DC (Vdd, Vref) parameters for testing their product. Additionally, the customer can create a motherboard test pattern algorithm using the "Script Code" function. The new TurboCATS III-1600ST performs the test with no-wait states in the operating system.
Utilizing the "Script Code" function gives the customer a high degree of flexibility in terms of timing bus programming for creating unique Read and Write programming transactions under best and worst case AC parameters scenarios. This can also be used to create a no-wait state bus transaction in the Read to Write cycle.
- Script Code Function
- Older model TurboCATS test systems provided a wide variety of AC test patterns but did not allow the user to generate a proprietary test pattern. The new TCIII-1600ST offers the "Script Code" feature. This will let the end user program proprietary test patterns.
- Utilizing the script programming language, the customer can create a customized test pattern and then use the Script Code pattern generation compiler to compile and generate the new test pattern. The new pattern is then imported into the test list with AC (tSU, tWD, tRCD, tCL, tAL, tWR,tRP, tRC, tRFC, etc) and DC (Vdd, Vref) parameters for customized testing.
- The end user can also create motherboard test pattern algorithms, utilizing the Script Code function and then use this in addition to the programmable AC and DC parameters. Test patterns in the TC III-1600ST perform much faster than the stand alone Motherboard test because there are no "wait states" in the operating systems.
- Script Code programming gives the end user a great deal of flexibility in programming the timing bus to create a unique Read and Write bus transaction under best and worst case AC parameters. In addition, a "no wait" state bus transaction can be created in the Read to Write cycle.
- A built in compiler and debugger environment is in the Script Code programming. This allows the user to monitor the timing waveform of the programming algorithm and the timing bus transactions under the Signal Tap tool.
Heat Chamber Optional
Heat Chamber is also available to be combined with the TCIII-1600ST test system.
- Seven-segment Temperature Display
- Temperature Setting Option
- Temperature Range (85°C - Room Temperature)
- Pneumatic Control System
- Automatic level-control, manual operation not required
|DDR3 - PC6400 (800Mbps), PC8500 (1066Mbps), PC10600 (1333Mbps) & PC12800 (1600Mbps)|
|DDR2 - PC3200 (400Mbps), PC4200 (533Mbps), PC5300 (667Mbps) & PC6400 (800Mbps)|
|Operating clock frequency from 200Mhz to 800Mhz|
|8 or 16 test sockets available for faster thru-put in a production environment|
|Form factor supports: 240P LODIMM, 200P SODIMM, 204P SODIMM, IC components, Custom form factors|
|Single adapter supports both unbuffered and registered module testing|
|Supports LRDIMM testing, with voltage supply 1.35v - 1.5v & clock frequency 400Mhz - 800Mhz|
|Supports AC/DC parametric and user script pattern programming|
|Supports SPD programming, read, test and write-protect|
|Over 35 industry standard AC test patterns available to the end user to customize their test lists|
|Error logging up to 512 locations of Row/Column/BA/Burst/DQ's|
|Optional 8 or 16 module testing, in parallel, for high throughput on production floor|
|Optional heat chamber for hot environmental testing from 32°C to 85°C|
|Optional handler interface is available for combining the TCIII-1600ST with an automated handler|
A handler interface is also available to be combined with the TCIII-1600ST test system with an automated handling system.
- TCIII-1600ST main screen (8-site)
- TCIII-1600ST main screen (16-site)
- Shmoo plots (8-site)
- Shmoo plots (16-site)
- Signal tap with timing diagram
- Script code
- DC connectivity function
- DC contact function
- Test list
- Security privilege