Supports Speeds of up to 2133 Mbps

Taking control of your memory IC testing

  • Each test board contains up to 6 sites for x8 device. Each chassis can support up to 16 test boards that have a total of 96 sites for x8 device
  • Each PC can support up to 4 chassis, with a total of 384 sites of x8 devices
  • Number of sites for the chassis can be requested by the customers

None-Cable HiFix

Simple Setup, Ease of Management

TurboCATS is pioneering a high performing None-Cable HiFix unit integrated with our TCIII-2133IC test system. The TCIII-2133IC system is connected to the IC socket board via TurboCATS' None-Cable HiFix unit, which is cable-less to maximize the performance of the signal transmission. This ensures that the tester is easy to maintain since the user no longer needs to go through hundred of cable wires within the unit.

What is None-Cable HiFix?

Speed, signal integrity and costs are the challenges for building a HiFix unit integrated to the automated handler system. The conventional HiFix comes with a large bundle of long cable wires to connect with the HiFix and IC socket boards. It causes signal degradation and timing jitter due to the impedance mismatching, conductor losses, radiation effects, etc. It is also difficult to maintain and repair any problems that need to go through a large bundle of cable wires.

GUI Failure Analysis

Shmoo Plot

A two-dimensional diagram that shows the status of the DQ bits of Memory ICs varying over a range of the user's selected parameters (timing and input voltage level).

Graphical Identification of DQ's

Represents the failed DQ pins locations, graphically.
The software uses a graphical picture to show the test failures at the hardware level: If the IC fails during the test, there would be indications (displayed in RED) marking the failed pin(s) and signal(s).

Bit Failure Mapping

A tool that helps the user to find and display the failed DQ bits in the RAM. The corresponding row and column addresses the failed DQ bits, which will be spotted and displayed for the user.

Combination of Failures

  • Functional Failure: Cell stuck-at, coupling, neighborhood sensitivity and software error faults
  • Parametric Failure: (AC) Speed timing vs. Vdd threshold, (DC) Leakage and Idd's
  • Hot-Temperature Failure: System high temperature environment

Script Code Function (optional)

Script Code Debugger

TurboCATS introduces a new, revolutionary feature called Script Code in its DDR3 and DDR4 test system, the TCIII-2133ST. In this new system, the customer can use the script programming language to create a customized test pattern. Once the pattern is created, the Script Code pattern generator/compiler is used to compile the code and then generate the new test pattern.

The Script Code function also contains a built-in compiler and debugger for the Script Code programming, which allows the customer to monitor the timing waveform of the programming algorithm as well as the timing bus transactions. This is all accomplished under the Signal Tap tool.

The TurboCATS III-2133ST performs the test with no-wait states in the operating system. Utilizing the Script Code function gives the customer a high degree of flexibility in terms of timing bus programming for creating unique Read and Write programming transactions under best and worst case AC parameters scenarios. This can also be used to create a no-wait state bus transaction in the Read to Write cycle.

Multi-Site Networking

Easy to Configure

The TCIII-2133IC IC test system can be networked so the user can test up to 512 devices using one PC to control the entire operation. This gives the customer greater flexibility in terms of increasing testing capacity on as need basis. Cost are minimized since there will be no need for additional man labor to handle the increased capacity.

Handler Interface (optional)

Available to be combined with the TCIII-2133IC test system

TurboCATS Series testers support both manual and automated handler testing. It can be integrated to various handlers with/without the None-Cable HiFix and support up to 192 DUT's on DDR3/DDR4 IC, or 128 DUT's on eMCP/LPDDR IC.

M6771AD/M6741AD Handler

  • DDR4/DDR3/LPDDR3/LPDDR2 up to 64 DUT's or 128 DUT's

HT-3309 Handler

  • LPDDR3/LPDDR2/eMCP up to 128 DUT'S
  • DDR3/DDR4 up to 192 DUT's


Test Capabilities

  • DDR4 - 1600Mbps, 1866Mbps, 2133Mbps
  • DDR3 - 1333Mbps, 1600Mbps, 1866Mbps
  • LPDDR4 - 1600Mbps, 1866Mbps, 2133Mbps
  • LPDDR3 - 1333Mbps, 1600Mbps, 1866Mps
  • LPDDR2 - 667Mbps, 800Mbps, 1066Mbps
  • Clock frequency from 667MHz to 1066MHz

eMCP Function

  • Parallel test on LPDDR+ eMMC to save test time
  • eMMC formatting flow

DC & AC Parametric Tests

  • Supports ISVM and VSIM
  • Supports Continuity, Leakage, Idd's measurement
  • Over 35 industry standard AC test patterns
  • Supports user defines script programming for DC/AC parametric tests
  • Auto timing calibration

GUI Failure Analysis Tool

  • Graphical identification of Failed bad IC's and DQ's
  • Error logging locations of Row/Column/Blanks/Burst/DQ's
  • Bitmapping display the failed DQ bits in the ICs
  • Supports Address / Data Scramble function
  • Optional tools include Bit Failure Mapping & Schmoo Plot to display the failed Blanks(s) / DQ's bit in the RAM

Flexible Configuration

  • Configurable from 6-site to 512-site for parallel testing
  • Proper chassis design to meet various selective handlers requirement
  • Supports custom load boards for manual test
  • Supports None-Cable HiFix for integrating to selective handler interface
  • Optional environmental tests from low and high temperature ranging from -30°C to 125°C
  • Optional heat chamber for hot environmental testing from 32°C to 85°C

AC Specifications:

Test Frequency DDR3
533Mhz to 933Mhz
800Mhz to 1066Mhz
333MHz to 533MHz
533MHz to 933MHz
800MHz to 1066MHz
Switching Data Rate DDR3
1066Mbps to 1866Mbps
1600Mbps to 2133Mbps
667Mbps to 1066MHz
1066Mbps to 1866Mbps
1600Mbps to 2133Mbps
I/O Interface DDR3 SSTL-15, Class I & Class II
SSTL-135, Class I & Class II
DDR4 POD-12, 1.2V Pseudo Open Drain I/O
LPDDR2 1.2V HSTL Class 1
Clock Lines 1 pair per site
Address Depth DDR3 16 Rows, 15 Columns, 3 BAs per site
DDR4 18 Rows, 15 Columns, 4 BAs per site
LPDDR2 14 Rows, 10 Columns, 3 BAs per site
LPDDR3 15 Rows, 12 Columns, 3 BAs per site
Data Width 8 I/O
DQS's Differential
Control Lines DDR3,
2 CS's, 2 CLKE, 1 RAS, 1 CAS, 1 WE
2 CS's, 2 CLKE, 10 CA pins
2 CS's, 2 CLKE, 10 CA pins, 1 ODT
Termination On-chip, dynamic
Variable Timing Edges tSU/tHD, tWD, tDQSS, tAC
Programmable Timing DDR3,
tRCD, tCL, tRL, tWL, tAL, tRP, tRFC, tWR, etc.
tRCD, tRL, tWL, tAL, tRP, tRFC, tWR, etc.
SPD Programming Read, Write, Byte Matching, Write Protect, Slot Test, etc.
eMCP Function LPDDR +eMMC are tested in parallel and single test flow to save test time
LPDDR2 to 800Mbps, LPDDR3 to 1866Mbps, LPDDR 4 to 2133Mbps
Supports eMMC formatting flow
Control PC Windows 7 (64 bit) or better, Networking interface
AC Power Source 110-240VAC, 50/60Hz

TCIII-2667IC with Heat Chamber (optional)

The heat Chamber creates a hot testing environment to simulate the accelerated life testing and analyze the behaviors of the module.

Heat Chamber Specifications:

Power Supply 220V, 50Hz (90 - 110% of rated voltage)
Power Consumption Power-up : 15A, 220V
Normal operation : 10A, 220V
Display Method 7 Segment LED Display
Processing value (PV) : Green
Setting value (SV) : Red
Display Accuracy F.S ±0.5% rdg ±1 digit based on SV or 3°C Max.
Sampling Time 0.5 sec. fixed
Vibration 0.75mm amplitude at frequency of 10-55Hz in each of X, Y, Z directions for 2 hours
Ambient Temperature -10 - 50°C
Storage Temperature -20 - 60°C
Ambient Humidity 35 - 85% RH
Temperature Range 25°C - 85°C
Recommend Setting Temperature 80°C
Air Input Min. 0.5 MPa - Max. 1.0 MPa
Min. 75 psi - 145 psi
Diameter of Gas Tube 6 mm

Software Screenshots:

Main Operating Window

Test Device Configuration

Test Plan

Shmoo Plot Dot

TURBOCATS, LTD. RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind.